Event date:
May 3 2024 2:30 pm

A Low Harmonic, Reduced Common Mode Voltage oriented Multi-Drive System: Investigation and Development

Dr. Muhammad Jahangir Ikram
Prof. Nauman Ahmad Zaffar
Akbar Ali Khan
EE Reading Room, Maxwell’s Wing, Second Floor, SBASSE, LUMS
PhD Thesis defense


Variable frequency drives are a key component of industrial electro-mechanical processes and have been a continuous subject of improvement to address power quality concerns. Moreover, there are a significant number of processes, which require multiple motors/AC loads employed to work from a common DC-link constituting multi-inverter/multi-drive systems. For such systems, additional degrees of freedom of control can be provisioned to gain an overall improved efficiency and quality. DC-link harmonics and common mode voltage are among the key quality concerns for the inverter systems. In parallel inverter systems, the DC-link harmonics/ripples can be catered via standard career shifts/interleaving in PWM, with the potential to achieve significant improvements if proper modeling of parameters can be developed. On the other hand, common mode voltage can be addressed by design by modification of PWM schemes. Both of these targeted modifications in PWM have been proposed and investigated individually in literature, while their combined implementation is needed to be explored. This work, as a first contribution, develops a dedicated time-domain formulation of DC-link current, applicable flexibly on single/multi-inverter systems and on any space vector based PWM scheme. Based on which a numerical mechanism of DC-link ripple minimization is proposed, which is validated to outperform existing interleaving methods. As a second contribution, in addition to the traditional concept of time based interleaving, a contemporary concept of sequence-based interleaving is investigated for DC-link ripple minimization combined with the proposed numerical method. This interleaving alternate exhibits an additional benefit of switching synchronism with PWM rectifiers for back-back converters, and is shown to bring more flexibility of implementation as well. In the extension of this sequence interleaving concept, the combined impact of sequence and time interleaving is investigated in this work. Using comparative numerical assessment followed by simulations and experimental validations for these alternate interleaving methods, sequence-based interleaving is found to be the most effective interleaving method for dynamic loads. Therefore, as a third contribution, the idea of sequence interleaving is extended for implementation on modified PWM schemes that are designed to target common mode voltage reduction. The corresponding results ascertain an effective suppression of DC-link current harmonics alongside the reduction in common mode voltage. Additionally, these findings are applied and experimentally demonstrated in a special application for 3n multi-phase machines. Finally, the sequence-based interleaving along with modified PWM schemes is suitably implemented and validated on standard closed-loop motor drive techniques. Thus, a step-by-step investigative process with due validation is followed to mature a very effective mechanism of interleaved PWM schemes for multi-drive systems or generically for any multi-inverter systems offering a combined package of minimized DC-link harmonics and reduced common mode voltage.

Final Thesis Defense Committee:

  1. Dr. Tariq Mahmood Jadoon (Associate Professor, Thesis Committee Member), Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Pakistan 

  2. Dr. Hassan Abbas Khan (Associate Professor, Thesis Committee Member), Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Pakistan

  3. Dr. Ammar Ahmed Khan (Assistant Professor, Thesis Committee Member), Department of Physics, Lahore University of Management Sciences (LUMS), Pakistan

  4. Prof. Dr. Syed Abdul Rahman Kashif (Professor, External Examiner), Department of Electrical Engineering, University of Engineering and Technology, Lahore, Pakistan

  5. Dr. Muhammad Jahangir Ikram (Associate Professor, PhD Supervisor), Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Pakistan

  6. Prof. Nauman Ahmad Zaffar (Professor of Practice, PhD Co-Supervisor), Department of Electrical Engineering, Lahore University of Management Sciences (LUMS), Pakistan

List of Publications:

  1. Khan, A. A., Zaffar, N. A., & Ikram, M. J. (2023). DC-Link Ripple Reduction for Parallel Inverter Systems by a Novel Formulation Using Multiple Space Vector-Based Interleaving SchemesElectronics12(6), 1496.

  2. Khan, N. A. Zaffar and M. J. Ikram. (2023). Comparative Evaluation of DC-link Capacitor RMS Current Stress for Conventional and Reduced Common Mode Voltage SVPWM based Inverters. IEEE 24th Workshop on Control and Modeling for Power Electronics (COMPEL), Ann Arbor, MI, USA, 2023, pp. 1-7, doi: 10.1109/COMPEL52896.2023.10221179.

  3. Khan, N. A. Zaffar and M. J. Ikram, "Evaluation of Active Zero Switch PWM for Interleaved Dual Inverter systems, " [accepted] 2024 IEEE 25th Workshop on Control and Modeling for Power Electronics (COMPEL).

  4. Khan, N. A. Zaffar, M. J. Ikram, "Performance Evaluation of Vector Control Induction Motor Drive with Reduced Common Mode Voltage based PWM schemes", [accepted] 2024 IEEE 25th Workshop on Control and Modeling for Power Electronics (COMPEL).

  5. Khan, N.A.Zaffar, M. J. Ikram, Yixuan Wu, Luca Peretti, "Simultaneous Reduction of DC-link Harmonics and Common Mode Voltage in Interleaved Multi-inverter Systems by Modified SVPWM Schemes", [submitted], IEEE Transactions in Industrial Electronics, 2024.