Dr. Adeel Pasha, Assistant Professor, at the Syed Babar Ali School of Science and Engineering (SBASSE) at LUMS, presented a paper at the 22nd Annual IEEE Conference on Design, Automation and Test in Europe (DATE) held in Florence, Italy from March 25-29, 2019.
Mr. Afzal Ahmad (BSEE-2017 Alumnus) who is currently working as a Research Assistant (RA) with Dr. Pasha is the first author in this paper. It was an honour for LUMS to have Dr. Pasha present this paper at the conferences especially since the acceptance rate at DATE was only 24% this year. The paper has also won the HEC International Travel Grant as well as LUMS Faculty Travel Grant (FTG).
The paper titled ‘Towards Design Space Exploration and Optimization of Fast Algorithms for Convolutional Neural Networks (CNNs) on FPGAs’ analyses Winograd minimal filtering or fast convolution algorithms to reduce the arithmetic complexity of convolutional layers of CNNs.
Convolutional Neural Networks (CNNs) have gained widespread popularity in the field of computer vision and image processing. Due to huge computational requirements of CNNs, dedicated hardware-based implementations are being explored to improve their performance. Hardware platforms such as Field Programmable Gate Arrays (FPGAs) are widely being used to design parallel architectures for this purpose.
The paper explores a complex design space to find the sets of parameters that result in improved throughput and power-efficiency. The authors have also designed a pipelined and parallel Winograd convolution engine that improves the throughput and power-efficiency while reducing the computational complexity of the overall system. The proposed designs show up to 4.75× and 1.44× improvements in throughput and power-efficiency, respectively, in comparison to the state-of-the-art design while using approximately 2.67× more multipliers. Furthermore, the obtained savings are up to 53.6% in logic resources compared with the state-of-the-art implementation.